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A10240 - MM74C174N Hex D Flip-Flop by National
The MM74C174N hex D flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. All have a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clear is independent of clock and accomplished by a low level at the clear input. All inputs are protected by diodes to VCC and GND.
Features:
Wide supply voltage range 3.0V to 15V
Guaranteed noise margin 1.0V
High noise immunity 0.45 VCC (typ.)
Low power TTL compatiblity
16 pin DIP. Manufactured by National.
A10240
Features:
Wide supply voltage range 3.0V to 15V
Guaranteed noise margin 1.0V
High noise immunity 0.45 VCC (typ.)
Low power TTL compatiblity
16 pin DIP. Manufactured by National.
A10240
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Product Information
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A10240 - MM74C174N Hex D Flip-Flop by National
A10240 - MM74C174N Hex D Flip-Flop by National
The MM74C174N hex D flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. All have a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clear is independent of clock and accomplished by a low level at the clear input. All inputs are protected by diodes to VCC and GND.
Features:
Wide supply voltage range 3.0V to 15V
Guaranteed noise margin 1.0V
High noise immunity 0.45 VCC (typ.)
Low power TTL compatiblity
16 pin DIP. Manufactured by National.
A10240
Features:
Wide supply voltage range 3.0V to 15V
Guaranteed noise margin 1.0V
High noise immunity 0.45 VCC (typ.)
Low power TTL compatiblity
16 pin DIP. Manufactured by National.
A10240
$0.79
Original: $2.25
-65%A10240 - MM74C174N Hex D Flip-Flop by National—
$2.25
$0.79Product Information
Product Information
Shipping & Returns
Shipping & Returns
Description
The MM74C174N hex D flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. All have a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clear is independent of clock and accomplished by a low level at the clear input. All inputs are protected by diodes to VCC and GND.
Features:
Wide supply voltage range 3.0V to 15V
Guaranteed noise margin 1.0V
High noise immunity 0.45 VCC (typ.)
Low power TTL compatiblity
16 pin DIP. Manufactured by National.
A10240
Features:
Wide supply voltage range 3.0V to 15V
Guaranteed noise margin 1.0V
High noise immunity 0.45 VCC (typ.)
Low power TTL compatiblity
16 pin DIP. Manufactured by National.
A10240












